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ADC510 Dual Channel Analog Input FMC

ADC510 Dual Channel Analog Input FMC

The ADC510 enables integration of dual channels of analog input into embedded computing systems. The innovative design of the ADC510, based on the emerging VITA 57 standard, makes it easier for developers to integrate FPGAs and analog input into their embedded system designs. Typical DSP applications for this module include Signal Intelligence (SIGINT), Electronic Counter Measures (ECM), and Radar.

The ADC510 is a dual-channel 500/550 MSPS analog input FPGA Mezzanine Card (FMC) based on the VITA 57 specification. This specification allows I/O devices to be directly coupled to a host FPGA. On the ADC510, the two ADC devices connect through the FMC site to an FPGA-based host board, maximizing data throughput and minimizing latency.

Specifications

  • Analog Input:
    • Number of Channels  2, single-ended
    • Sampling Frequency   Up to 550MSPS
    • Full Scale Input Voltage   2V2 pk-pk
    • Device   2x TI ADS5463/ADS54RF63
    • Input Bandwidth (3dB)   >1.7GHz
    • Input Impedance   50 Ohm, AC coupled
    • SNR (device)   65 dBFS
    • SFDR (device)   73 dBc
    • ENOB (device)   10.1 bits at 250MHz
  • Clock & Trigger Inputs:
    • Clock Input Connector   Front panel MMCX
    • Clock Input   50 Ohm, AC coupled LVPECL
    • Clock Input Frequency  Sample rate is half input clock frequency (i.e. 1GHz for 500MSPS)
  • Internal clock  selectable from:
    • 600MHz: 300MSPS
    • 640MHz: 320MSPS
    • 800MHz: 400MSPS
    • 1000MHz: 500MSPS
    • Trigger Input/Output  Single-ended, 50 Ohm, LVPECL buffered to host FPGA
  • Miscellaneous:
    • LEDs 2x yellow (host FPGA controlled)
    • Digital I/O   4 differential pairs
  • Software/HDL Code:
    • Host HDL Code  Analog input hosted by our FusionXF suite on FPE650 6U quad FPGA VPX (contact Sales for other hosts)
  • Environmental:
    • Ruggedization levels  Air-cooled, air-cooled rugged and conduction-cooled